The International Conference on Field-Programmable Logic and Applications (FPL) was the first and remains the largest conference covering the rapidly growing area of field-programmable logic and reconfigurable computing. During the past 25 years, many of the advances in reconfigurable system architectures, applications, embedded processors, design automation methods and tools were first published in the proceedings of the FPL conference series. The conference objective is to bring together researchers and practitioners from both academia and industry and from around the world.

The 26th edition will take place in Lausanne, Switzerland, from 29th August 2016 until 2nd September 2016. Tutorials and Workshops will run Monday and Friday while Tuesday through Thursday will take place the main conference.

Venue

The conference will be held on the EPFL campus in the brand-new Swiss Tech Convention Centre, a unique structure with a futuristic design. EPFL is one of the two Swiss Federal Institutes of Technology. With the status of a federal polytechnic university since 1969, the young engineering school has grown in many dimensions, to the extent of becoming a world renown institution of science and technology. EPFL is located in Lausanne in Switzerland, on the shores of the largest Alpine lake, Lake Geneva, and at the foot of the Alps, close to Mont Blanc. It is easy to reach by air through Geneva airport (more than 100 cities with non-stop flights, frequent comfortable direct trains from inside the airport to Lausanne in about 50 minutes) and through Zurich airport (connected non-stop to around 200 cities, frequent comfortable direct trains from inside the airport to Lausanne in about two hours and a half).

Important Dates

Abstract submission deadline: 20th March 2016

Paper submission deadline: 27th March 2016 AoE (please note: no extensions!)

Demo night, PhD forum, workshops, and tutorials submission deadline: 8th May 2016

Notifications: around 15th June 2016

Final manuscripts deadline: 3rd July 2016

Calls for Contributions

Here is the latest Call for Contributions in PDF.

Here is the latest Call for PhD Forum and Demo Night Contributions in PDF.

The conference proceedings will me made available online at the FPL 2016 venue and will be published through IEEE Xplore after the conference.

Submissions

Authors are required to use the standard IEEE templates in format A4 and not to include page numbers, to ensure compatibility with IEEE Xplore. Templates for LaTeX and Microsoft Word 2003 are available directly from IEEE.

FPL 2016 uses a double-blind reviewing system. Manuscripts must not identify authors or their affiliations; those that do will not be considered. Exceptions may be allowed with prior approval of the Programme Chairs, in cases where the authors’ identity is vital to evaluating the paper (e.g., papers presenting updates of infrastructure used by the FPGA community). References to the authors’ prior work should be made in the 3rd person, in the same way one would reference work by others. If necessary to maintain anonymity, citations may be shown as "Removed for blind review", but consider that this may impede a thorough review if the removed citation is crucial to understanding the submission.

Papers can be submitted for one of the following categories (please note the later deadline for the last two types of papers). All papers will be published in the proceedings and will appear in IEEE Xplore. Strict paper length limitations are as follows:

Full papers 8 pages + up to 2 additional pages which can be purchased at the time of registration for 150 CHF/page + references (i.e., references are not counted in the page budget)
Short papers 4 pages, including references
PhD Forum papers 2 pages, including references
Demo Night papers 1-page abstract, including references

Use this submission site to submit your paper. Please note that the submission of the full- and short-paper abstracts by the relevant deadline is mandatory and that deadlines are not going to be extended.

Organizing Committee

General Chairs

  • Paolo Ienne, EPFL, CH
  • Walid Najjar, University of California Riverside, US

Programme Chairs

  • Jason Anderson, University of Toronto, CA
  • Philip Brisk, University of California Riverside, US

Workshop and Tutorial Chairs

  • Pierre‐Emmanuel Gaillardon, University of Utah, US
  • Michael Hübner, Ruhr-Universität Bochum, DE

PhD Forum and Demo Night Chairs

  • Mirjana Stojilović, HEIG‐VD, CH
  • Yann Thoma, HEIG‐VD, CH

Proceedings Chair

  • Walter Stechele, TU München, DE

Publicity Chair

  • Kubilay Atasu, IBM Research – Zurich, CH

Local Arrangements Chair

  • Chantal Schneeberger, EPFL, CH

Local Arrangements Team

  • Mikhail Asiatici, EPFL, CH
  • Andrew Becker, EPFL, CH
  • Lana Josipović, EPFL, CH
  • Ana Petkovska, EPFL, CH
  • Grace Zgheib, EPFL, CH

Registration Chair

  • Andrew Becker, EPFL, CH

Programme Committee

  • Michael Adler, Intel, US
  • Hideharu Amano, Keio University, JP
  • David Andrews, University of Arkansas, US
  • Sameh Asaad, IBM, US
  • Kubilay Atasu, IBM, CH
  • Peter Athanas, Virginia Tech, US
  • Trevor Bauer, Xilinx, US
  • Samuel Bayliss, Xilinx, US
  • Kia Bazargan, University of Minnesota, US
  • Jürgen Becker, Karlsruher Institut für Technologie, DE
  • Tobias Becker, Maxeler Technologies, UK
  • Pascal Benoit, Université Montpellier 2, FR
  • Neil Bergmann, University of Queensland, AU
  • Koen Bertels, Technische Universiteit Delft, NL
  • Vaughn Betz, University of Toronto, CA
  • Dustyn Blasig, National Instruments, US
  • Michaela Blott, Xilinx, IE
  • Christophe Bobda, University of Arkansas, US
  • Cristiana Bolchini, Politecnico di Milano, IT
  • Christos Bouganis, Imperial College London, UK
  • Eli Bozorgzadeh, University of California Irvine, US
  • Gordon Brebner, Xilinx, US
  • Stephen Brown, Altera, CA
  • João M. P. Cardoso, Universidade do Porto, PT
  • Benjamin Carrion Schafer, Hong Kong Polytechnic University, HK
  • Luigi Carro, Universidade Federal do Rio Grande do Sul, BR
  • Deming Chen, University of Illinois at Urbana-Champaign, US
  • Peter Cheung, Imperial College London, UK
  • Kiyoung Choi, Seoul National University, KR
  • Paul Chow, University of Toronto, CA
  • Jason Cong, University of California Los Angeles, US
  • Philippe Coussy, Université de Bretagne Sud, FR
  • Jose Gabriel Coutinho, Imperial College London, UK
  • Rene Cumplido, Instituto Nacional de Astrofisica, MX
  • Martin Danek, Daiteq, CZ
  • Anup Das, University of Southampton, UK
  • Sabya Das, Xilinx, US
  • Eduardo de la Torre, Universidad Politécnica de Madrid, ES
  • André DeHon, University of Pennsylvania, US
  • Steven Derrien, Université de Rennes 1, FR
  • Oliver Diessel, University of New South Wales, AU
  • Pedro Diniz, University of Southern California, US
  • Apostolos Dollas, Technical University of Crete, GR
  • Carl Ebeling, Altera, US
  • Suhaib A. Fahmy, University of Warwick, UK
  • Fabrizio Ferrandi, Politecnico di Milano, IT
  • Elliott Fleming, Intel, US
  • Blair Fort, University of Toronto, CA
  • Roberto Giorgi, Università di Siena, IT
  • Diana Goehringer, Ruhr-Universität Bochum, DE
  • Guy Gogniat, Université de Bretagne Sud, FR
  • Maya Gokhale, Lawrence Livermore National Laboratory, US
  • Kees Goossens, Technische Universiteit Eindhoven, NL
  • Ann Gordon-Ross, University of Florida, US
  • David Greaves, University of Cambridge, UK
  • Jonathan Greene, Microsemi, US
  • Yajun Ha, National University of Singapore, SG
  • Yuko Hara-Azumi, Tokyo Institute of Technology, JP
  • Reiner Hartenstein, Technische Universität Kaiserslautern, DE
  • Martin Herbordt, Boston University, US
  • James C. Hoe, Carnegie Mellon University, US
  • Michael Hübner, Ruhr-Universität Bochum, DE
  • Miaoqing Huang, University of Arkansas, US
  • Eddie Hung, Imperial College London, UK
  • Paolo Ienne, EPFL, CH
  • Arpith Jacob, IBM, US
  • Nachiket Kapre, Nanyang Technological University, SG
  • Sinan Kaptanoglu, Microsemi, US
  • Wolfgang Karl, Karlsruher Institut für Technologie, DE
  • Ryan Kastner, University of California San Diego, US
  • Alireza Kaviani, Xilinx, US
  • Tom Kean, Algotronix, UK
  • Udo Kebschull, Goethe Universität Frankfurt, DE
  • Andrew Kennings, University of Waterloo, CA
  • Kenneth Kent, University of New Brunswick, CA
  • Taemin Kim, Intel, US
  • Kenji Kise, Tokyo Institute of Technology, JP
  • Vipin Kizheppatt, Mahindra École Centrale, IN
  • Andreas Koch, Technische Universität Darmstadt, DE
  • Dirk Koch, University of Manchester, UK
  • Jan Korenek, Brno University of Technology, CZ
  • Akash Kumar, Technische Universität Dresden, DE
  • Martin Langhammer, Altera, UK
  • Luciano Lavagno, Politecnico di Torino, IT
  • Miriam Leeser, Northeastern University, US
  • Guy Lemieux, University of British Columbia, CA
  • Philip Leong, University of Sydney, AU
  • Wayne Luk, Imperial College London, UK
  • Patrick Lysaght, Xilinx, US
  • Wai-Kei Mak, National Tsing Hua University, TW
  • Tsutomu Maruyama, University of Tsukuba, JP
  • Cathal McCabe, Xilinx, IE
  • Nele Mentens, Katholieke Universiteit Leuven, BE
  • Antonio Miele, Politecnico di Milano, IT
  • Roger Moussalli, IBM, US
  • Walid Najjar, University of California Riverside, US
  • Brent Nelson, Brigham Young University, US
  • Smail Niar, Université de Valenciennes, FR
  • David Novo, Université Montpellier 2, FR
  • Jose Nunez-Yanez, University of Bristol, UK
  • Gianluca Palermo, Politecnico di Milano, IT
  • Ioannis Papaefstathiou, Technical University of Crete, GR
  • Cameron Patterson, Virginia Tech, US
  • Christian Pilato, Columbia University, US
  • Thilo Pionteck, Universität zu Lübeck, DE
  • Marco Platzner, Universität Paderborn, DE
  • Christian Plessl, Universität Paderborn, DE
  • Dionisios Pnevmatikatos, Technical University of Crete, GR
  • Daniel Poznanovic, Cray, US
  • Madhura Purnaprajna, Amrita University, IN
  • Rodric Rabbah, IBM, US
  • Kyle Rupnow, Advanced Digital Sciences Center, SG
  • Mazen Saghir, American University of Beirut, LB
  • Kentaro Sano, Tohoku University, JP
  • Marco D. Santambrogio, Politecnico di Milano, IT
  • Paul Schumacher, Xilinx, US
  • Olivier Sentieys, Université de Rennes 1, FR
  • Muhammad Shafique, Karlsruher Institut für Technologie, DE
  • Lesley Shannon, Simon Fraser University, CA
  • Cristina Silvano, Politecnico di Milano, IT
  • Nicolas Sklavos, University of Patras, GR
  • Ioannis Sourdis, Chalmers Tekniska Högskola, SE
  • Dirk Stroobandt, Universiteit Gent, BE
  • Henry Styles, Xilinx, US
  • Jürgen Teich, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE
  • Russ Tessier, University of Massachusetts Amherst, US
  • David Thomas, Imperial College London, UK
  • Tim Todman, Imperial College London, UK
  • Hiroyuki Tomiyama, Ritsumeikan University, JP
  • Lionel Torres, Université Montpellier 2, FR
  • Jim Tørresen, Universitetet i Oslo, NO
  • Steve Trimberger, Xilinx, US
  • Wim Vanderbauwhede, University of Glasgow, UK
  • Tanya Vladimirova, University of Leicester, UK
  • Qiang Wang, Huawei, US
  • John Wawrzynek, University of California Berkeley, US
  • Norbert Wehn, Universität Kaiserslautern, DE
  • Markus Weinhardt, Hochschule Osnabrück, DE
  • Gabriel Weisz, Information Sciences Institute, US
  • Steve Wilton, University of British Columbia, CA
  • Michael Wirthlin, Brigham Young University, US
  • Stephan Wong, Technische Universiteit Delft, NL
  • Roger Woods, Queen's University Belfast, UK
  • Sotirios Xydis, National Technical University of Athens, GR
  • Yoshiki Yamaguchi, University of Tsukuba, JP
  • Wei Zhang, Hong Kong University of Science and Technology, HK
  • Zhiru Zhang, Cornell University, US
  • Daniel Ziener, Friedrich-Alexander-Universität Erlangen-Nürnberg, DE
  • Peter Zipf, Universität Kassel, DE

Steering Committee

Chairman

  • Patrick Lysaght, Xilinx, US
  • Jürgen Becker, Karlsruher Institut für Technologie, DE
  • Koen Bertels, Technische Universiteit Delft, NL
  • Eduardo Boemo, Universidad Autónoma de Madrid, ES
  • João M. P. Cardoso, Universidade do Porto, PT
  • Peter Y. K. Cheung, Imperial College London, UK
  • Martin Danek, Daiteq, CZ
  • Apostolos Dollas, Technical University of Crete, GR
  • Fabrizio Ferrandi, Politecnico di Milano, IT
  • Manfred Glesner, Technische Universität Darmstadt, DE
  • John Gray, consultant, UK
  • Reiner Hartenstein, Technische Universität Kaiserslautern, DE
  • Andreas Herkersdorf, Technische Universität München, DE
  • Udo Kebschull, Goethe Universität Frankfurt, DE
  • Wayne Luk, Imperial College London, UK
  • Jari Nurmi, Tampere University of Technology, FI
  • Lionel Torres, Université Montpellier 2, FR
  • Jim Tørresen, Universitetet i Oslo, NO

Sponsors

Technical Sponsor

  • IEEE

Platinum Level

  • EcoCloud
  • Huawei

Golden Level

  • Altera
  • Micron
  • Xilinx

Silver Level

  • Algo-Logic
  • Atomic Rules
  • IBM

Previous Editions

  • FPL 2015: London, UK
  • FPL 2014: Munich, DE
  • FPL 2013: Porto, PT
  • FPL 2012: Oslo, NO
  • FPL 2011: Chania, GR
  • FPL 2010: Milano, IT
  • FPL 2009: Prague, CZ
  • FPL 2008: Heidelberg, DE
  • FPL 2007: Amsterdam, NL
  • FPL 2006: Madrid, ES
  • FPL 2005: Tampere, FI
  • FPL 2004: Leuven, BE
  • FPL 2003: Lisbon, PT
  • FPL 2002: La Grande-Motte, FR
  • FPL 2001: Belfast, UK
  • FPL 2000: Villach, AT
  • FPL 1999: Glasgow, UK
  • FPL 1998: Tallinn, EE
  • FPL 1997: London, UK
  • FPL 1996: Darmstadt, DE
  • FPL 1995: Oxford, UK
  • FPL 1994: Prague, CZ
  • FPL 1993: Oxford, UK
  • FPL 1992: Vienna, AT
  • FPL 1991: Oxford, UK